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Commit dddf9472 authored by Martin Schroschk's avatar Martin Schroschk
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Fix table heading

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2 merge requests!483Automated merge from preview to main,!472Issue 263
......@@ -72,16 +72,16 @@ The current SGI Altix is based on the dual core Intel Itanium 2
processor (code name "Montecito"). One core has the following basic
properties:
| | |
| Component | Count |
|-------------------------------------|----------------------------|
| clock rate | 1.6 GHz |
| integer units | 6 |
| floating point units (multiply-add) | 2 |
| peak performance | 6.4 GFLOPS |
| Clock rate | 1.6 GHz |
| Integer units | 6 |
| Floating point units (multiply-add) | 2 |
| Peak performance | 6.4 GFLOPS |
| L1 cache | 2 x 16 kB, 1 clock latency |
| L2 cache | 256 kB, 5 clock latency |
| L3 cache | 9 MB, 12 clock latency |
| front side bus | 128 bit x 200 MHz |
| Front side bus | 128 bit x 200 MHz |
The theoretical peak performance of all Altix partitions is hence about 13.1 TFLOPS.
......
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