From a761b3dac24fa1cf1ac8712cf32af341049a2d97 Mon Sep 17 00:00:00 2001 From: Sebastian Doebel <sebastian.doebel@tu-dresden.de> Date: Wed, 6 Nov 2024 16:45:23 +0100 Subject: [PATCH] add compiler switches for Capella --- doc.zih.tu-dresden.de/docs/software/compilers.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc.zih.tu-dresden.de/docs/software/compilers.md b/doc.zih.tu-dresden.de/docs/software/compilers.md index 774f11a10..25ae9c7cf 100644 --- a/doc.zih.tu-dresden.de/docs/software/compilers.md +++ b/doc.zih.tu-dresden.de/docs/software/compilers.md @@ -71,7 +71,7 @@ The following matrix shows proper compiler flags for the architectures at the ZI |------------|--------------------|----------------------|----------------------|-----| | [`Alpha Centauri`](../jobs_and_resources/alpha_centauri.md) | AMD Rome | `-march=znver2` | `-march=core-avx2` | `-tp=zen2` | | [`Barnard`](../jobs_and_resources/hardware_overview.md#barnard) | Intel Sapphire Rapids | `-march=sapphirerapids` | `-march=core-sapphirerapids` | | -| [`Capella`](../jobs_and_resources/capella.md)| AMD ||| +| [`Capella`](../jobs_and_resources/capella.md) | AMD Genoa | `-march=znver4` | | `-tp=zen4` | | [`Julia`](../jobs_and_resources/julia.md) | Intel Cascade Lake | `-march=cascadelake` | `-march=cascadelake` | `-tp=cascadelake` | | [`Romeo`](../jobs_and_resources/romeo.md) | AMD Rome | `-march=znver2` | `-march=core-avx2` | `-tp=zen2` | | All x86 | Host's architecture | `-march=native` | `-xHost` or `-march=native` | `-tp=host` | -- GitLab