From 44eb1ef9accbf986c0743082f90c3b0c372de5ad Mon Sep 17 00:00:00 2001 From: Martin Schroschk <martin.schroschk@tu-dresden.de> Date: Wed, 6 Dec 2023 13:48:24 +0100 Subject: [PATCH] Update table --- doc.zih.tu-dresden.de/docs/software/compilers.md | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/doc.zih.tu-dresden.de/docs/software/compilers.md b/doc.zih.tu-dresden.de/docs/software/compilers.md index 1ee00ce46..05f644cc3 100644 --- a/doc.zih.tu-dresden.de/docs/software/compilers.md +++ b/doc.zih.tu-dresden.de/docs/software/compilers.md @@ -67,12 +67,14 @@ Different architectures of CPUs feature different vector extensions (like SSE4.2 to accelerate computations. The following matrix shows proper compiler flags for the architectures at the ZIH: -| Architecture | GCC | Intel | PGI | -|--------------------|----------------------|----------------------|-----| -| Intel Haswell | `-march=haswell` | `-march=haswell` | `-tp=haswell` | -| AMD Rome | `-march=znver2` | `-march=core-avx2` | `-tp=zen` | -| Intel Cascade Lake | `-march=cascadelake` | `-march=cascadelake` | `-tp=skylake` | -| Host's architecture | `-march=native` | `-xHost` | | +| HPC System | Architecture | GCC | Intel | PGI | +|------------|--------------------|----------------------|----------------------|-----| +| [`Alpha Centauri`](../jobs_and_resources/alpha.md) | AMD Rome | `-march=znver2` | `-march=core-avx2` | `-tp=zen` | +| [`Barnard`](../jobs_and_resources/barnard.md) | AMD Sapphire Rapids | `-march=znver2` | `-march=core-avx2` | `-tp=zen` | +| [`Julia`](../jobs_and_resources/julia.md) | Intel Cascade Lake | `-march=cascadelake` | `-march=cascadelake` | `-tp=skylake` | +| [`Power9`](../jobs_and_resources/power9.md) | IBM Power9 | `-march=znver2` | `-march=core-avx2` | `-tp=zen` | +| [`Romeo`](../jobs_and_resources/romeo.md) | AMD Rome | `-march=znver2` | `-march=core-avx2` | `-tp=zen` | +| All | Host's architecture | `-march=native` | `-xHost` | | To build an executable for different node types (e.g. Cascade Lake with AVX512 and Haswell without AVX512) the option `-march=haswell -axcascadelake` (for Intel compilers) -- GitLab